1. Field of the Invention
The present invention generally relates to semiconductor devices and more particularly to a compound semiconductor device of a current-driven type and an integrated circuit thereof.
2. Description of the Related Art
Group III-V compound semiconductor materials have a general characteristic of a small effective mass of electrons and are used extensively for high speed semiconductor devices such as HEMT (high electron mobility transistor), HET (hot electron transistor), HBT (hetero bipolar transistor), and the like. Further, some of the group III-V compound semiconductor materials have a band structure that cause a direct transition of carriers and are used for optical semiconductor devices such as a laser diode.
Such high-speed compound semiconductor devices include a current-driven-type device, such as an HBT, wherein it is desired to adjust the resistance of the current path. Generally, such an adjustment is achieved easily by inserting an external resistance in the current path. However, use of such an external resistance is cumbersome in the integrated circuit of the semiconductor device. In such a case, it is more preferable to form the resistance inside the layered structure of the semiconductor device as a part of the layered structure.
FIG. 1 shows the construction of a typical HBT in a cross-sectional view.
Referring to FIG. 1, the HBT is constructed on a semi-insulating GaAs substrate 1 and includes a collector contact layer 2 of n.sup.+ -type GaAs formed on the substrate 1, a collector layer 3 of undoped GaAs formed on the collector contact layer 2, a base layer 4 of p-type GaAs formed on the collector layer 3 and an emitter layer 5 of n-type InGaP formed on the base layer 4, wherein there is further provided an emitter contact layer 6 of n.sup.+ -type GaAs on the emitter layer 5, and an emitter electrode 7 is provided on the emitter contact layer 6 thus formed. Further, a base electrode 8 is provided on an exposed part of the base layer 4, and a collector electrode 9 is provided on an exposed part of the collector contact layer 2.
In the conventional HBT having such a typical construction, it should be noted that the emitter resistance of the device is primarily determined by the thickness, the carrier density and the area of the emitter layer 5 as well as the emitter contact layer 6. Thus, when it is desired to have an emitter resistance different from the emitter resistance of the structure, as in the case of designing a circuit, generally an external resistance in the form of an interconnection pattern has been provided. However, such a use of an external resistance complicates the interconnection pattern and increases the number of fabrication steps. For example, the use of an external resistance may require an extra ion implantation process, and the extra ion implantation process may include an extra mask process. Further, use of such an external resistance may result in a decrease of operational speed due to increased parasitic capacitance and inductance.